ARM Cortex-M3 User Manual

List of Tables
ARM DDI 0337G Copyright © 2005-2008 ARM Limited. All rights reserved. xiii
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Table 19-8 ETM input port timing parameters ........................................................................... 19-5
Table 19-9 Miscellaneous output ports timing parameters ........................................................ 19-5
Table 19-10 Low power output ports timing parameters ............................................................. 19-6
Table 19-11 AHB output ports timing parameters ....................................................................... 19-6
Table 19-12 PPB output ports timing parameters ....................................................................... 19-8
Table 19-13 Debug interface output ports timing parameters ..................................................... 19-8
Table 19-14 ETM interface output ports timing parameters ........................................................ 19-9
Table 19-15 HTM interface output ports timing parameters ........................................................ 19-9
Table 19-16 Test output ports timing parameters ..................................................................... 19-10
Table A-1 Clock signals ............................................................................................................. A-2
Table A-2 Reset signals ............................................................................................................. A-3
Table A-3 Miscellaneous signals ............................................................................................... A-4
Table A-4 Interrupt interface signals .......................................................................................... A-6
Table A-5 Low power interface signals ...................................................................................... A-7
Table A-6 ICode interface .......................................................................................................... A-8
Table A-7 DCode interface ........................................................................................................ A-9
Table A-8 System bus interface ............................................................................................... A-10
Table A-9 Private Peripheral Bus interface .............................................................................. A-11
Table A-10 ITM interface ........................................................................................................... A-12
Table A-11 AHB-AP interface .................................................................................................... A-13
Table A-12 ETM interface .......................................................................................................... A-14
Table A-13 HTM interface .......................................................................................................... A-16
Table A-14 Test interface .......................................................................................................... A-17
Table A-15 WIC interface signals .............................................................................................. A-18
Table B-1 Differences between issue E and issue F ................................................................. B-1
Table B-2 Differences between issue F and issue G ................................................................. B-5

ARM Cortex-M3 Specifications

General

Architecture	ARMv7-M
Instruction Set	Thumb-2
Pipeline Stages	3-stage
Interrupts	Nested Vectored Interrupt Controller (NVIC)
Interrupt Controller	Nested Vectored Interrupt Controller (NVIC)
Memory Protection Unit	Optional
Power Consumption	Varies by implementation
Max Clock Speed	Up to 100 MHz
Debugging	JTAG and Serial Wire Debug (SWD)
Operating Voltage	1.8V to 3.6V
Manufacturing Process	Varies by implementation
Core Type	32-bit