Revisions
B-6 Copyright © 2005-2008 ARM Limited. All rights reserved. ARM DDI 0337G
Non-Confidential
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More information added about the stacked xPSR Saved xPSR bits on page 2-9
Reset value of Configuration Control Register changed to
0x00000200
Table 3-1 on page 3-2
System and Vendor_SYS memory regions added to table of
memory region permissions
Table 4-2 on page 4-4
Memory region for Private Peripheral Bus changed to +0000000
SLEEPHOLDREQ changed to SLEEPHOLDREQn Throughout the book
SLEEPHOLDACK changed to SLEEPHOLDACKn Throughout the book
DEEPSLEEP signal changed to SLEEPDEEP Throughout the book
DBGRESTARTACK changed to DBGRESTARTED Throughout the book
DBGRESTARTREQ changed to DBGRESTART Throughout the book
New subsection added to describe the WIC Using the Wake-up Interrupt Controller on page 7-6
Address of Irq 224 to 239 Priority Register changed to
0xE000E4EC
Table 8-1 on page 8-3
Enhanced description of function of C_MASKINTS field Table 10-2 on page 10-4
Settings for DWT Function Registers updated Table 11-18 on page 11-28
Minor change to timing information of ETMIA Figure 15-4 on page 15-9
Change to timing information for ETMIVALID Figure 15-7 on page 15-11
SLEEPHOLDREQn removed from table of miscellaneous input
ports timing parameters
Table 19-1 on page 19-2
Table of low power input ports timing parameters added Table 19-2 on page 19-2
FIXHMASTERTYPE added to table of debug input ports timing
parameters
Table 19-6 on page 19-4
Input changed to Output in table header Table 19-9 on page 19-5, Table 19-11 on page 19-6
and Table 19-12 on page 19-8 to Table 19-16 on
page 19-10 inclusive
SLEEPING, SLEEPDEEP, and SLEEPHOLDACKn removed
from table of miscellaneous output ports timing parameters
Miscellaneous output ports timing parameters on
page 19-5
Table B-2 Differences between issue F and issue G (continued)
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