CHAPTER 2-2: Clock Gating
106 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
[bit25:24] CECRST[1:0]: Reset control of HDMI-CEC/Remote Control Reception
These bits control the reset of each channel of HDMI-CEC/Remote Control Reception. The
correspondence between each bit and the HDMI-CEC/Remote Control Reception channel is shown
below.
bit24 - CECRST0: HDMI-CEC/Remote Control Reception channel 0
bit25 - CECRST1: HDMI-CEC/Remote Control Reception channel 1
If the relevant bit is set to 1, the channel of corresponding HDMI-CEC/Remote Control Reception
becomes a reset state, the HDMI-CEC/Remote Control Reception operation stops, and the register
settings are initialized. For products to which the relevant HDMI-CEC/Remote Control Reception channel
is not mounted, do not change this bit from the initial value. To release the reset state, be sure to set this
bit to 0 again.
Releases the reset of HDMI-CEC/Remote Control Reception channel corresponding to the relevant
bit.(Initial value)
Issues the reset to HDMI-CEC/Remote Control Reception channel corresponding to the relevant bit.
[bit23:21] Reserved: Reserved bits
Write 0 to these bits.
[bit20] PCRCRST: Reset control of Programmable-CRC
This bit controls the reset of the Programmable-CRC unit. If this bit is set to 1, the SD card interface
becomes a reset state, the operation of the Programmable-CRC stops, and the register settings are
initialized. For products to which the Programmable-CRC is not mounted, do not set this bit to 1. To
release the above-mentioned reset state, be sure to set this bit to 0 again.
Releases the reset of Programmable-CRC. (Initial value)
Issue the reset signal to Programmable-CRC.
[bit19:18] Reserved: Reserved bits
Write 0 to these bits.
[bit17:16] I2SRST[1:0]: Reset control of I
2
S Interface
These bits control the reset of each channel of I
2
S Interface. The correspondence between each bit and
the I
2
S Interface channel is shown below.
bit16 – I2SRST0: I
2
S Interface channel 0
bit17 – I2SRST1: I
2
S Interface channel 1
If the relevant bit is set to 1, the channel of corresponding I
2
S Interface becomes a reset state, the I
2
S
Interface operation stops, and the register settings are initialized. For products to which the relevant I
2
S
Interface channel is not mounted, do not change this bit from the initial value. To release the reset state,
be sure to set this bit to 0 again.
Releases the reset of I
2
S Interface channel corresponding to the relevant bit.(Initial value)
Issues the reset to I
2
S Interface channel corresponding to the relevant bit.
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