Cypress FM4 Series - Port I;O Direction Set Register (VBDDR)

CHAPTER 7-3: VBAT Domain(B)
348 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
7.10 Port I/O Direction Set Register (VBDDR)
VBDDR Register sets the I/O direction of pins.
In TYPE4-M4 products, the GPIO function of P46/X0A pin and P47/X1A pin is an input only, therefore
they cannot be used as an output port.
bit
7
6
5
4
3
2
1
0
Field
Reserved
VDDR3
VDDR2
VDDR1
VDDR0
Attribute
-
R/W
R/W
R/W
R/W
Initial value
-
0
0
0
0
The interface circuit type for this register is type 3.
[bit7:4] Reserved: Reserved bits
These bits read 0b0000.
In a write access to these bits, write 0b0000 to them.
[bit3] VDDR3: Port direction of P46/X0A pin set bit
[bit2] VDDR2: Port direction of P47/X1A pin set bit
[bit1] VDDR1: Port direction of P49/VWAKEUP pin set bit
[bit0] VDDR0: Port direction of P48/VREGCTL pin set bit
bit
Description
Reading
A read access reads the value of this bit. [Initial value = 0]
Writing
0
The GPIO port is used as an input port.
If the pin corresponding to the VDDR3/VDDR2/VDDR1/VDDR0 bit is used as an I/O pin of a
peripheral function, the setting of the VDDR3/VDDR2/VDDR1/VDDR0 bit is ignored.
1
The GPIO port is used as an output port.
If the pin corresponding to the VDDR3/VDDR2/VDDR1/VDDR0 bit is used as an I/O pin of a
peripheral function, the setting of the VDDR3/VDDR2/VDDR1/VDDR0 bit is ignored.