Cypress FM4 Series - Backup Registers

CHAPTER 7-2: VBAT Domain(A)
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 263
2.5 Backup Registers
The FM4 Family has 32-byte backup registers retaining data with the VBAT power supply.
Overview of Function of Backup Registers
A backup register retains values written to it while power is being supplied to the VBAT power supply pin.
The backup register is reset by the power-on circuit immediately after the VBAT power supply has been
turned on.
As the application of the VBAT power supply can be checked by reading the value of Power-on bit (PON)
in the VDET Register, initialize the backup register with a program whenever necessary.
Configuration of Backup Register and Method of Accessing Backup Register
The interface circuit type for the backup register is type 3.
For details, see "2.1 Interfacing with Always-on Domain".
The data transfer between a backup register and a data retention register is a batch transfer of data of all
areas.
Update data according to the following procedure.
1. Set the VB_CLKDIV Register to a value that makes the transfer clock become 1 MHz or below.
2. Recall (BREAD) data from the data retention register to the buffer register.
If 1 is written to Back up register recall control bit (BREAD) in the WTCR20 Register, the recall
operation starts and Transfer flag bit (TRANS) in the WTCR10 Register becomes 1.
If the recall operation ends, Transfer flag bit (TRANS) in the WTCR10 becomes 0.
3. Modify the content of the buffer register.
The buffer register allows random read access and random write access.
4. Save data in the buffer register to the data retention register.
If 1 is written to Back up register save control bit (BWRITE) in the WTCR20 Register, the save
operation starts and Transfer flag bit (TRANS) in the WTCR10 Register becomes 1.
If the save (BWRITE) operation ends, Transfer flag bit (TRANS) becomes 0.
* If the power supply of the Always-on Domain is turned off, data of the buffer register is lost. Therefore,
always transfer data retained in the buffer register to the data retention register by executing a save
(BWRITE) operation.
* While transferring data to the data retention register (Transfer flag bit (TRANS) in the WTCR10 Register
is 1), do not access the buffer register.
* If the Always-on Domain has been reset during the data transfer or the VCC power supply is turned off,
the integrity of the data of the data retention register cannot be guaranteed.