Cypress FM4 Series - AHB Config Register

CHAPTER 15: SD Card Interface
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 885
2.35 AHB Config Register
This register controls the configuration of the AHB bus.
D31 D16
Rsvd
D15 D07
D06
D05
D04
D03
D02
D01
D00
Rsvd
Big/Little Endian Select
BSLOCK SEL
BSLOCK
SINEN
INCRSEL
Bit
Attribute
Description
31-07
Rsvd
Reserved
06
RW
Big/Little Endian Select
This bit selects the endianness from big endian and little endian.
0: Selects little endian.
1: Selects big endian.
*: For this Family, set this bit to 0.
Set/Reset
Condition
Set
1 Write
However, no value can be written to this bit during the DMA
transfer.
Reset (0)
System reset
0 Write
However, no value can be written to this bit during the DMA
transfer.
05
RW
BSLOCKSEL
This bit selects a method of controlling the bus lock.
0: The bus lock is used while 1 packet (512 bytes) is being transferred.
1: The bus lock is used during the DMA transfer.
Set/Reset
Condition
Set
1 Write
However, no value can be written to this bit during the DMA
transfer.
Reset (0)
XRESET_I
0 Write
However, no value can be written to this bit during the DMA
transfer.