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Cypress FM4 Series - Port Input Data Register (VBDIR)

Cypress FM4 Series
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CHAPTER 7-2: VBAT Domain(A)
294 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
7.11 Port Input Data Register (VBDIR)
VBDIR Register indicates the input data of pins.
bit
7
6
5
4
3
2
1
0
Field
Reserved
VDIR3
VDIR2
VDIR1
VDIR0
Attribute
-
R
R
R
R
Initial value
-
x
x
x
x
The interface circuit type for this register is type 4.
[bit7:4] Reserved: Reserved bits
These bits read 0b0000.
In a write access to these bits, write 0b0000 to them.
[bit3] VDIR3: Port input data of P46/X0A pin bit
[bit2] VDIR2: Port input data of P47/X1A pin bit
[bit1] VDIR1: Port input data of P49/VWAKEUP pin bit
[bit0] VDIR0: Port input data of P48/VREGCTL pin bit
bit
Description
Reading
0
Regardless of the pin function settings (VBPFR[3:0], VBDDR and VBDOR Registers), this
bit indicates that the pin is in the L level input state or the L level output state. If the P46 and
P47 pins are used as special function pins according to the settings of the SPSR1 and
SPSR0( bit[5:4]) in the VBPFR Register, this bit always reads 0 as the input is blocked.
1
Regardless of the pin function settings (VBPFR[3:0], VBDDR and VBDOR Registers), this
bit indicates that the pin is in the H level input state or the H level output state.
Writing
Writing a value to this bit has no effect on operation.

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