Cypress FM4 Series - Write Error Address Register (WEAD)

CHAPTER 14: External Bus Interface
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 837
6.13 Write Error Address Register (WEAD)
The WEAD register enables/disables the preceding read and continuous write access.
bit
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Field
ADDR[31:16]
Attribute
R
Initial Value
0x0000
bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Field
ADDR[15:0]
Attribute
R
Initial Value
0x0000
[bit31:0] ADDR
These bits are used to hold the AHB address at the reception of an error response on write access when
the continuous write access of Access Mode Register (AMODE) is enabled (WAEN=1). When an error
response is received in the subsequent write access, the bit is rewritten to a new state.
To clear this register to be initial state, write 0 to WERRCLR bit of Error Status Clear Register (ESCLR).
When the continuous write access of Access Mode Register (AMODE) is enabled (WAEN=0) and the
frequency division ratio of Division Clock Register (DCLKR) is one (MDIV=0), the state of this bit is not
held in write access.