CHAPTER 19: Programmable CRC
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 953
5.2 Example of Computing 2
This example2 shows computing which checks the CRC code when data is received to the following
64-bit serial bit sequence. This was transmitted in the computing example 1. This example is explained
based on the following conditions.
The bit sequence is received from left to right. The values used for generator polynomial and initial values
are same as those used when the CRC code is generated. The CRC computing results are not inverted.
64-bit received data is stored as 2word-32bit values on the MCU memory.
64-bit sequence with CRC (receive from left to right)
00010010 00110101 10011010 10111100 01111000 00110001
11001101 10111010
Memory storage format
(0x 12 35 9A BC), (0x 78 31 CD BA) ・・・format A (MSB-first/Big Endian)
(0x BC 9A 35 12), (0x BA CD 31 78) ・・・format B (MSB-first/Little Endian)
(0x 48 AC 59 3D), (0x 1E 8C B3 5D) ・・・format C (LSB-first/Big Endian)
(0x 3D 59 AC 48), (0x 5D B3 8C 1E) ・・・format D (LSB-first/Little Endian)
Select the computing data input format to CRC computing unit so that the format matches to the storage
format in the memory of 64-bit received data shown above. Table 5-2 below shows examples of the
register setting value, computing input value and computing output value for each storage format
A/B/C/D.
Table 5-2 Example of Value for CRC Computing Example 2
1. Set the value of generator polynomial for the PRGCRC_POLY register. Set 0x1021 0000 according
with generator polynomial. (value common to format A, B, C and D, and same value when the CRC
code is generated)
2. Set the CRC initial value for the PRGCRC_SEED register. Since the CRC initial value is 0xFFFF, set
0xFFFF 0000. (value common to format A, B, C and D, and same value when the CRC code is
generated)
3. Set the PRGCRC_FXOR register. Set 0x0000 0000 without performing bit inversion. (value common
to format A, B, C and D, and is not same value when the CRC code is generated)
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