CHAPTER 15: SD Card Interface
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 847
2.3 Block Count Register
This register is used to configure the number of data blocks.
*: This register is divided into two registers, one for writing and another for reading.
The register for writing keeps the current value until the next access is made to this register, or a
hardware reset is generated or a software reset is generated.
In addition, the read value of this register is the value of the register for reading. The content in the
register for writing is written to the register for reading at the start of data transfer. The block count in
the register for reading decreases whenever the transfer of 1 block of data ends.
Since the register for reading is controlled by SD_BCLK_I, if it is not synchronized with A_HCLK_I or
SD_BCLK_I, a value of this register read during a transfer (The Read/Write Transfer Active bit in the
Present State Register is 1.) may not be correct.
For other details of this register, refer to SD Specifications Part A2.
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