CHAPTER 11: DSTC
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 517
3.1.4 Setting Chain Start and Transfer End Interrupt Notification
CHRS[5:0], CHLK
The DSTC executes transfers for the number of times specified in each DES (IIN times if MODE = 0, 1
time if MODE = 1) after receiving a Start Trigger. After executing transfers, the DSTC the next process
according to the value of CHRS[5:0] in DES0. Table 3-8 shows the method of setting the Chain Start and
the transfer end interrupt notification.
Table 3-8 Details of CHRS[5:0]
These bits select how the DSTC operates
after the transfer number counter remain value becomes (ORM == 1) && (IRM == 1).
00: No interrupt flag is set. There is no Chain Start. The DSTC ends the transfer.
01: An interrupt flag is set. There is no Chain Start. The DSTC ends the transfer.
10: No interrupt flag is set. The DSTC executes a Chain Start on the next DES.
11: Setting prohibited (A DES open error occurs.)
These bits select how the DSTC operates
after the transfer number counter remain value becomes (ORM! = 1) && (IRM == 1).
00: No interrupt flag is set. There is no Chain Start. The DSTC waits for a Start Trigger.
01: An interrupt flag is set. There is no Chain Start. The DSTC waits for a Start Trigger.
10: No interrupt flag is set. The DSTC executes a Chain Start on the next DES.
11: No interrupt flag is set. The DSTC executes a Chain Start again on the current DES.
If MODE is "1", these bits select how the DSTC operates
after the transfer number counter remain value becomes (IRM! = 1).
00: No interrupt flag is set. There is no Chain Start. The DSTC waits for a Start Trigger.
01: An interrupt flag is set. There is no Chain Start. The DSTC waits for a Start Trigger.
10: No interrupt flag is set. The DSTC executes a Chain Start on the next DES.
11: No interrupt flag is set. The DSTC executes a Chain Start again on the current DES.
If MODE is "0", the above settings are meaningless.
Write "00" to CHRS[1:0] if MODE is "0".
(Writing a value other than "00" to CHRS[1:0] if MODE is "0" causes a DES open error.)
This bit selects the next transfer started by the Chain Start whether
to execute immediately after the current transfer (Chain Lock) or
to enable other transfers to be executed before the next transfer started by the Chain Start.
0: After the current transfer, other transfers can be executed before the Chain Start transfer.
1: The Chain Start transfer is executed immediately after the current transfer.
If the next process is the Chain Start on the next DES, the DSTC starts transferring data according to the
next DES. If the next process is the Chain Start again on the current DES, the DSTC starts transferring
data according to the current DES again. If the next process does not involve the Chain Start, the DSTC
ends the transfer (or waits for the next Start Trigger). The status of the transfer number counter
determines which of CHRS[5:4], CHRS[3:2] and CHRS[1:0] the DSTC follows when executing the next
process after the current DES.
In the case of not executing the Chain Start, after an interrupt flag is set, the DSTC can notify the CPU of
the fact that the DSTC has ended the transfer (or is waiting for the next Start Trigger). In the case of SW
Transfer or Chain Start Transfer from SW Transfer, the DSTC set the SWST bit to the SWTR register to
"1". In the case of HW Transfer or Chain Start Transfer from HW Transfer, the DSTC set the HWINT[n]
register to "1".