Cypress FM4 Series - Port Function Setting Register (Pfrx)

CHAPTER 12: I/O Port
596 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
4.1 Port Function Setting Register (PFRx)
The PFRx register selects usage of a pin.
List of PFR Register Configuration
bit
31
16
15
0
Initial value
Attribute
Corresponding port
Reserved
PFR0
0x001F
R/W
P0F to P00
Reserved
PFR1
0x0000
R/W
P1F to P10
Reserved
PFR2
0x0000
R/W
P2F to P20
Reserved
PFR3
0x0000
R/W
P3F to P30
Reserved
PFR4
0x0000
R/W
P4F to P40
Reserved
PFR5
0x0000
R/W
P5F to P50
Reserved
PFR6
0x0000
R/W
P6F to P60
Reserved
PFR7
0x0000
R/W
P7F to P70
Reserved
PFR8
0x0000
R/W
P8F to P80
Reserved
PFR9
0x0000
R/W
P9F to P90
Reserved
PFRA
0x0000
R/W
PAF to PA0
Reserved
PFRB
0x0000
R/W
PBF to PB0
Reserved
PFRC
0x0000
R/W
PCF to PC0
Reserved
PFRD
0x0000
R/W
PDF to PD0
Reserved
PFRE
0x0000
R/W
PEF to PE0
Reserved
PFRF
0x0000
R/W
PFF to PF0
Detailed Register Configuration
bit
31
16
15
0
Field
Reserved
PFRx
Register Function
[bit31:16] Reserved: Reserved bits
0x0000 is read out from these bits.
When writing these bits, set them to 0x0000.
[bit15:0] PFRx: Port Function Setting Register x
Selects usage of a pin.
bit
Description
Reading
Can read out the setting value of the register.
Writing
0
Uses a pin as a GPIO pin.
1
Uses a pin as an input/output pin of peripheral functions.