Cypress FM4 Series - Sdclk

CHAPTER 15: SD Card Interface
914 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
5. SDCLK
Base Clock frequency that generates SDCLK differs by products.
For TYPE1-M4 product, Figure 5-1 shows. Base Clock frequency is same as HCLK frequency.
For TYPE3-M4, TYPE5-M4, TYPE6-M4 products, Figure 5-2 shows. Base Clock frequency is HCLK
frequency divided by four.
Figure 5-1 TYPE1-M4 Product
Figure 5-2 TYPE3-M4, TYPE5-M4, TYPE6-M4 Products
HCLK
Register
SDCard I/F
AHB I/F
signal
Divide SDCLK
SDCLK
Frequency
Select
Max:160MHz
Max:160MHz
Base Clock
HCLK
Divided
by 2
Register
SDCard I/F
AHB
Sync up
AHB
Sync down
AHB I/F
signal
AHB I/F
signal
Divided
by 2
Divide SDCLK
SDCLK
Frequency
Select
Max:160-200MHz Max:80-100MHz
Max:40-50MHz
Base Clock