CHAPTER 3: Clock Supervisor
144 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
4. Setup Procedure Examples
This section explains examples of setting up the clock supervisor functions.
Example of Clock Failure Detection Function Setup Procedure
Notes:
− When 32 kHz oscillation clock control linkage bit of VBAT register Sub oscillation control register
(WTOSCCNT.SOSCNTL) is changed from 1 to 0, write a register value after the sub clock
oscillation stabilization wait completion.
− To operate only VBAT domain with turning off the power on CHIP side, set
WTOSCCNT.SOSCNTL=0 and then turn off the power on CHIP side. Moreover, after the power
on CHIP side is turned off, sub clock supervisor function does not operate.
− For details on VBAT, see Chapter VBAT Domain.
Yes
No
Yes
No
Setup Start
Oscillation stabilization wait time
of main and sub clocks end
Clock failure detection operation
of main and sub clocks starts
Failure Detected?
The CSV reset occurs
Enable main and sub clock
oscillators
Stop Monitoring?
End
Access the CSV_CTL register
Disable the enable bit
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