Cypress FM4 Series - Operation Examples

CHAPTER 3: Clock Supervisor
146 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
5. Operation Examples
This section explains examples of clock supervisor operations.
Clock Failure Detection
Figure 5-1 provides an example of clock failure detection operation.
Figure 5-1 Example of Clock Failure Detection Operation
Main clock
High-speed
CR clock
Main clock is missing
32 x CR clocks
CSV reset
Reset occurs
1. The main clock stops due to failure.
2. The function counts up clocks using the high-speed CR clock.
3. If the main clock keeps stopping during 32 clocks of high-speed CR, the function determines that the
clock has failed and issues the CSV reset.
Note:
− In case of the sub clock monitoring, the function determines that the sub clock has failed if it
keeps stopping during 32 clocks of low-speed CR.
Figure 5-2 provides an example of the clock failure detection operation in stop mode.
Figure 5-2 Example of Clock Failure Detection Operation in Stop Mode
1. In stop mode, the main clock and high-speed CR clock stop.
Meanwhile, the clock monitoring function also stops.
2. Upon the release of stop mode, oscillation of main clock and high-speed CR clock restart, waiting for
oscillation stabilization. Meanwhile, the clock monitoring function keeps stopping.
3. When the oscillation stabilization wait time ends, the clock monitoring restarts.
Main clock
(Sub clock)
High speed
CR clock
(Low speed-
CR clock)
Stop mode
Main (Sub) clock stops
High speed CR clock stops
RUN STOP
Waiting for
oscillation
stabilization
RUN
Waiting for oscillation
stabilization
Clock monitoring is
active
Clock monitoring is disabled
Clock monitoring
is active
(Low speed CR clock stops)