Cypress FM4 Series - IRQ027;031;035 Batch Read Register (Irqxxxmon)

CHAPTER 8: Interrupts
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 401
4.14 IRQ027/031/035 Batch Read Register (IRQxxxMON)
The IRQ027MON, IRQ031MON and IRQ053MON Registers can read out at once the interrupts (OCU
ch.0 to ch.2 match detection interrupts of MFT unit 0 to unit 2) assigned to exception no. 43, no. 47 and
no. 51 respectively.
Register configuration
bit
31
8
Field
Reserved
Attribute
R
Initial value
0x000000
bit
7
6
5
4
3
2
1
0
Field
Reserved
OCUINT
Attribute
R
R
Initial value
00
000000
Register function
[bit31:6] Reserved: Reserved bits
A reserved bit reads 0.
[bit5:0] OCUINT
bit
Value
Description
5
0
There is no OCU ch.5 match detection interrupt request of the MFT unit
corresponding to the IRQxxxMON Register.
1
An OCU ch.5 match detection interrupt request of the MFT unit corresponding to the
IRQxxxMON Register has been made.
4
0
There is no OCU ch.4 match detection interrupt request of the MFT unit
corresponding to the IRQxxxMON Register.
1
An OCU ch.4 match detection interrupt request of the MFT unit corresponding to the
IRQxxxMON Register has been made.
3
0
There is no OCU ch.3 match detection interrupt request of the MFT unit
corresponding to the IRQxxxMON Register.
1
An OCU ch.3 match detection interrupt request of the MFT unit corresponding to the
IRQxxxMON Register has been made.
2
0
There is no OCU ch.2 match detection interrupt request of the MFT unit
corresponding to the IRQxxxMON Register.
1
An OCU ch.2 match detection interrupt request of the MFT unit corresponding to the
IRQxxxMON Register has been made.
1
0
There is no OCU ch.1 match detection interrupt request of the MFT unit
corresponding to the IRQxxxMON Register.
1
An OCU ch.1 match detection interrupt request of the MFT unit corresponding to the
IRQxxxMON Register has been made.
0
0
There is no OCU ch.0 match detection interrupt request of the MFT unit
corresponding to the IRQxxxMON Register.
1
An OCU ch.0 match detection interrupt request of the MFT unit corresponding to the
IRQxxxMON Register has been made.
See Table 3-1 and Table 3-2 for the relationship between exception no. and interrupt.