CHAPTER 14: External Bus Interface
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 769
3.3 NAND Flash Memory Access
The following explains NAND Flash memory access.
Memory Access Methods
Accesses to the NAND Flash memories will be converted as shown below, based on the base address for
the area set to NAND mode.
A write access to +0x2000 is converted into the issue of an address for the NAND Flash memory (MNALE
is asserted).
A write access to +0x1000 is converted into the issue of a command for the NAND Flash memory
(MNCLE is asserted).
A write/read access to +0x0000 will be converted to a data access to the NAND Flash memories (MNALE
and MNCLE will not be asserted).
In this case, all the access timing setups is the same as the setups used by SRAM accesses.
MNCLE will be output at the same timing of address output for accessing.
MNALE will be held asserted until a write access to +0x3000 or a write access other than an address
issuance (data or command) is made after the address is issued. This is because NAND Flash memories
cannot de-assert the MNALE between multiple write accesses for issuing addresses. An access to
+0x3000 will de-assert the MNALE only, not perform an access. Figure 3-6 shows the process of NAND
Flash memory access. (For details about the commands, see the specification of NAND Flash memory
connected to this family)
Pins Used
NAND Flash memory accesses require the pins shown in Table 3-5.
Table 3-5 External Interface Pins for NAND Flash Memories
Notes:
− Not all of the pins shown in Table 3-5 will be used depending on the setups or target devices
(NAND Flash memory).
− Number and functions of external bus interface pins used depend on the product used. See the
data sheets of products used for the details.
− Multiplex mode is not available for NAND Flash memory accesses.
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