Cypress FM4 Series - Sub Clock Supply Control Register (RCK_CTL)

CHAPTER 6: Low Power Consumption Mode
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 231
8.2 Sub Clock Supply Control Register (RCK_CTL)
The Sub Clock Supply Control Register controls clock supply to the RTC, HDMI-CEC/remote control
reception.
Power consumption can be reduced by stopping the clock supply to unused resource.
This register is available only in certain product TYPE.
Bit
7
6
5
4
3
2
1
0
Field
Reserved
CECCKE
RTCCKE
Attribute
-
R/W
R/W
Initial value
000000
0
1
[bit7:2] Reserved: Reserved bits
These bits always read 0b00000.
Writing a value to these bits has no effect on operation.
[bit1] CECCKE: CEC clock control bit
This bit controls the sub clock supplied to the HDMI-CEC/remote control reception macro.
Bit
Description
0
The sub clock is not supplied to the HDMI-CEC/remote control reception macro. [initial value]
1
The sub clock is supplied to the HDMI-CEC/remote control reception macro.
[bit0] RTCCKE: RTC clock control bit
TYPE5-M4 product has this bit.
This bit controls sub clock for RTC macro.
Bit
Description
0
The sub clock is not supplied to the RTC macro.
1
The sub clock is supplied to the RTC macro. [initial value]
Note:
− It is prohibited to write this register with the products which do not equip this.