Cypress FM4 Series - Page 230

CHAPTER 6: Low Power Consumption Mode
230 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
[bit2] DSTM: Deep standby mode select bit
This bit selects whether the CPU transits to a standby mode or a deep standby mode.
[bit1:0] STM: Standby mode select bits
These bits, together with the DSTM bit in this register and the RTCE bit in the RTC Mode Control Register
(PMD_CTL), select a standby mode to which the CPU transits from one of the following modes: Timer
mode, RTC mode, Stop mode, deep standby RTC mode or deep standby stop mode.
DSTM
STM
PMD_CTL:RTC
E
Description
bit1
bit0
0
0
0
0
Timer mode [initial value]
0
0
0
1
Setting is prohibited.
0
0
1
0
Setting is prohibited.
0
0
1
1
Setting is prohibited.
0
1
0
0
Stop mode
0
1
0
1
RTC mode
0
1
1
0
Setting is prohibited.
0
1
1
1
Setting is prohibited.
1
0
0
0
Setting is prohibited.
1
0
0
1
Setting is prohibited.
1
0
1
0
Setting is prohibited.
1
0
1
1
Setting is prohibited.
1
1
0
0
Deep standby stop mode
1
1
0
1
Deep standby RTC mode
1
1
1
0
Setting is prohibited.
1
1
1
1
Setting is prohibited.
Note:
− The value of the SPL bit, DSTM bit or STM bit is effective only when it is written at the same time
as 0x1ACC is written to the KEY bits. If a value other than 0x1ACC is written to the KEY bits, the
values written to the SPL bit, DSTM bit and STM bit become ineffective.