Cypress FM4 Series - Standby Mode Control Register (STB_CTL)

CHAPTER 6: Low Power Consumption Mode
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 229
8.1 Standby Mode Control Register (STB_CTL)
The Standby Mode Control Register controls standby modes and deep standby modes. The value of the
SPL bit, DSTM bit or STM bit is effective only when it is written at the same time as 0x1ACC is written to
the KEY bits.
Bit
31
16
15
8
Field
KEY
Reserved
Attribute
R/W
-
Initial value
0x0000
0x00
bit
7
6
5
4
3
2
1
0
Field
Reserved
SPL
Reserved
DSTM
STM
Attribute
-
R/W
-
R/W
R/W
Initial value
000
0
0
0
00
[bit31:16] KEY: Standby mode control write control bits
These bits release the write control of the SPL bit, DSTM bit and STM bit.
− When 0x1ACC is written to these bits
Writing to the SPL bit, DSTM bit or STM bit is effective.
− When a value other than 0x1ACC is written to these bits
Writing tothe SPL bit, DSTM bit or STM bit is not effective.
− These bits always read 0x0000.
[bit15:5] Reserved: Reserved bits
These bits always read 0x00.
Writing a value to these bits has no effect on operation.
[bit4] SPL: Standby pin level setting bit
This bit sets the state of a pin in Timer mode, RTC mode, Stop mode, deep standby RTC mode, deep
standby stop mode.
Bit
Description
0
Holds the state of a pin in Timer mode, RTC mode and Stop mode, and switches a pin to a
GPIO in deep standby RTC mode and deep standby stop mode. [initial value]
1
Sets the state of a pin to high impedance in Timer mode, RTC mode, Stop mode, deep
standby RTC mode, deep standby stop mode.
[bit3] Reserved: Reserved bit
This bit always reads 0.
Writing a value to this bit has no effect on operation.