Cypress FM4 Series - Refresh Timer Register (REFTIM)

CHAPTER 14: External Bus Interface
824 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
6.6 Refresh Timer Register (REFTIM)
The REFTIM register sets the refresh timing to SDRAM.
bit
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Field
Reserved
PRE
F
NREF
Attribute
-
R/W
R/W
Initial value
-
0
00000000
bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Field
REFC
Attribute
R/W
Initial value
0000000000110011
[bit31:25] Reserved: Reserved bits
The read value is undefined.
Set this bit to 0 when writing.
[bit24]PREF: Pre-Refresh
This bit set the preceding refresh.
For the detailed operations, see 3.9 Refresh Operation.
bit
Description
0
Disables the preceding refresh. [Initial Value]
1
Enables the preceding refresh.
[bit23:16]NREF: Number of Refresh
These bits set the issuing count of refresh at one-time refresh.
During the refresh operation, the access is disabled, but the refresh operation can be executed
intensively in the specified period. However, according to the refresh count specified with these bits, set
the REFC value by calculating the following formula.
REFC = (Count value of one-time refresh operation)  (NREF+1)
bit
Description
00000000
One time [Initial Value]
…
…
11111111
256 times