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Cypress FM4 Series - CRC Register (CRCR)

Cypress FM4 Series
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CHAPTER 13: CRC (Cyclic Redundancy Check)
754 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
3.4 CRC Register (CRCR)
The CRC Register (CRCR) is used to output the CRC calculation result. This register must be initialized
before start calculating.
bit
31
0
Field
D[31:0]
Attribute
R
Initial value
0xFFFFFFFF
[bit31:0] D[31:0] : CRC bits
These bits are used to read the CRC calculation result. If "1" is written to the initialization bit
(CRCCR:INIT), the value of the Initial Value Register (CRCINIT) is loaded to this register.
If input data for CRC calculation is written to the Input Data Register (CRCIN), the CRC calculation result
is set to this register after one machine clock cycle has elapsed. When all input data writing has been
completed, this register holds the final CRC code.
In CRC16 mode, when the byte order is set to big endian (CRCLTE=0), the result is output to D15 to D0.
When the byte order is set to little endian (CRCLTE=1), the result is output to D31 to D16.

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