Cypress FM4 Series - Deep Standby Return Enable Register (WIER)

CHAPTER 6: Low Power Consumption Mode
236 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
8.6 Deep Standby Return Enable Register (WIER)
The Deep Standby Return Enable Register enables the CPU to return from a deep standby mode due to
the WKUPx pin input, the low voltage detection (LVD) interrupt, the RTC interrupt and the
HDMI-CEC/Remote Control Reception interrupt that have occurred in a deep standby mode.
Bit
15
14
13
12
11
10
9
8
Field
Reserved
WCEC1E
WCEC0E
Attribute
-
R/W
R/W
Initial value
000000
0
0
bit
7
6
5
4
3
2
1
0
Field
WUI5E
WUI4E
WUI3E
WUI2E
WUI1E
Reserved
WLVDE
WRTCE
Attribute
R/W
R/W
R/W
R/W
R/W
-
R/W
R/W
Initial value
0
0
0
0
0
0
0
0
[bit15:10] Reserved: Reserved bits
These bits always read 0b000000.
Writing a value to these bits has no effect on operation.
[bit9] WCEC1E: HDMI-CEC/Remote Control Reception ch.1 interrupt return enable bit
This bit disables or enables the CPU to return from a deep standby mode due to the HDMI-CEC/Remote
Control Reception ch.1 interrupt.
Bit
Description
0
Disables the CPU to return from a deep standby mode due to the HDMI-CEC/Remote Control
Reception ch.1 interrupt. [initial value]
1
Enables the CPU to return from a deep standby mode due to the HDMI-CEC/Remote Control
Reception ch.1 interrupt.
[bit8] WCEC0E: HDMI-CEC/Remote Control Reception ch.0 interrupt return enable bit
This bit disables or enables the CPU to return from a deep standby mode due to the HDMI-CEC/Remote
Control Reception ch.0 interrupt.
Bit
Description
0
Disables the CPU to return from a deep standby mode due to the HDMI-CEC/Remote Control
Reception ch.0 interrupt. [initial value]
1
Enables the CPU to return from a deep standby mode due to the HDMI-CEC/Remote Control
Reception ch.0 interrupt.
[bit7:3] WUI5E to WUI1E: WKUPx pin input return enable bits
These bits disable or enable the CPU to return from a deep standby mode due to the WKUPx pin input.
Bit
Description
0
Disables the CPU to return from a deep standby mode due to the WKUPx pin input. [initial value]
1
Enables the CPU to return from a deep standby mode due to the WKUPx pin input.