Cypress FM4 Series - Page 237

CHAPTER 6: Low Power Consumption Mode
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 237
[bit2] Reserved: Reserved bit
This bit always reads 0.
Writing a value to this bit has no effect on operation.
[bit1] WLVDE: LVD interrupt return enable bit
This bit disables or enables the CPU to return from a deep standby mode due to the LVD interrupt.
Bit
Description
0
Disables the CPU to return from a deep standby mode due to the LVD interrupt. [initial value]
1
Enables the CPU to return from a deep standby mode due to the LVD interrupt.
[bit0] WRTCE: RTC interrupt return enable bit
This bit disables or enables the CPU to return from a deep standby mode due to the RTC interrupt.
Bit
Description
0
Disables the CPU to return from a deep standby mode due to the RTC interrupt. [initial value]
1
Enables the CPU to return from a deep standby mode due to the RTC interrupt.
Notes:
− The CPU returning from a deep standby mode due to the WKUP0 pin input is always enabled.
− This register is not initialized by the deep standby transition reset. ( include the interrupt pending
register in the NVIC)
− In the case of disabling the CPU returning from a deep standby mode due to LVD or RTC
interrupt, set the corresponding bits of this register to 0 and disable the interrupts themselves.