Cypress FM4 Series - Interrupt Function

CHAPTER 14: External Bus Interface
788 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
3.10 Interrupt Function
This section explains the error interrupt.
SRAM/Flash Memory Error
When the access is executed by SRAM/Flash memory error interrupt enable (MEMCERR.SFION=1) to
SRAM/Flash memory address area where the mapping is not implemented with the area register, an error
interrupt occurs. By writing1 to SRAM/Flash memory error (MEMCERR.SFER), the interrupt is cleared.
Figure 3-25 SRAM/Flash Memory Error Interrupt
SDRAM Error
When the access is executed by SDRAM interrupt enable (MEMCERR.SDION=1) to SDRAM address
area, if SDON of SDRAM mode register (SDMODE) is 0, an error interrupt occurs. By writing1 to SDRAM
error (MEMCERR.SDER), the interrupt is cleared
Figure 3-26 SDRAM Error Interrupt
SFIEN
An area of SDRAM/Flash address
where the mapping is not executed
is accessed.
SFER
MErrInt
(Error interrupt)
MCLKOUT 1cycle
Write SFER=1
Internal bus
An area of SDRAM/Flash address
where the mapping is not executed
is accessed.
Write SFER=1
SDIEN
Access to SDRAM
Address area.
SDON
SDER
MErrInt
(Error interrupt)
MSDCLK 1 cycle
Write SDER=1
Internal bus
Write SDER=1
Access to SDRAM
Address area.