Cypress FM4 Series - Explanation of Operations

CHAPTER 3: Clock Supervisor
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 143
3. Explanation of Operations
This section explains the operations of the clock supervisor functions.
Clock Failure Detection Function
The clock failure detection function monitors the main and sub clocks. If a rising edge of the monitored
clock is not detected within the specified period, this function determines that the oscillator has failed, and
outputs a system reset request.
− This reset request is referred to as the CSV reset request.
− CSV function monitors each of the main and sub clocks independently.
− It stops monitoring when the main and sub oscillators stop oscillating.
− It stops monitoring while waiting for oscillation stabilization wait time.
− When the oscillation stabilization wait time of main and sub oscillators ends, CSV function is
automatically enabled.
Notes:
− Each of the main and sub clock failure detection function can be enabled/disabled independently
using the CSV control register (CSV_CTL).
− The main clock is monitored with the high-speed CR clock, and the sub clock is monitored with
the low-speed CR clock. When a rising edge is not detected within 32 clocks of high-speed CR
for the main clock, or within 32 clocks of low-speed CR for the sub clock, this function determines
that the oscillator has failed.
Anomalous Frequency Detection Function
The anomalous frequency detection function monitors the main clock.
Within the specified period between a rising edge and the next rising edge of the divided clock of
high-speed CR, this function counts up the internal counter using the main clock. If the count value
reaches out of the set window range, the function determines that the main clock frequency is anomalous,
and outputs an interrupt request or a system reset request to the CPU.
− This interrupt request is referred to as the FCS interrupt request, and reset request as the FCS
reset request.
− The FCS function only monitors frequency of the main clock.
− It stops monitoring when the main oscillator stops oscillating.
− It stops monitoring while waiting for oscillation stabilization wait time.
− The FCS function is started with software, a user program.
Notes:
− If the FCS reset is enabled:
An interrupt request occurs the first time a counter value deviates from the set window. If the
interrupt request has not been cleared, and the counter value falls out of the specified window, a
system reset request is output.
If the FCS reset is not enabled, the reset request is masked.
− The counter value, if it goes out of the specified window, is stored in the frequency detection
counter register (FCSWD_CTL).