CHAPTER 11: DSTC
512 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
3.1.2 Setting Transfer Addresses
SA, DA, SAC[2:0], DAC[2:0]
Set the start address of the transfer source area (SA) in DES2 and the start address of the transfer
destination area (DA) in DES3. Align each transfer address to a specified data width (TW). The DSTC
cannot execute an unaligned transfer.
Specify the transfer address update methods during a transfer in the SAC[2:0] bits and DAC[2:0] bits in
DES0. The transfer address update method for SA and that for DA can be specified separately. Table 3-2
shows the methods of specifying transfer addresses.
Table 3-2 Specifying Transfer Addresses
Select the respective update methods of transfer addresses SA and DA during a
transfer.
000: The address is increased by TW×1 at every transfer without InnerReload.
001: The address is increased by TW×1 at every transfer with InnerReload.
010: The address is increased by TW×2 at every transfer without InnerReload.
011: The address is increased by TW×2 at every transfer with InnerReload.
100: The address is increased by TW×4 at every transfer without InnerReload.
101: The transfer address remains unchanged during a transfer.
110: The address is decreased by TW×1 at every transfer without InnerReload.
111: The address is decreased by TW×1 at every transfer with InnerReload.
Updating Transfer Number Counter and Transfer Address
Figure 3-1 is an example showing how the transfer number counter and the transfer addresses change
when the following settings are used: the number of outer loop transfers is 3, the number of inner loop
transfers is 4 and the transfer address is increased. The horizontal axis of this figure is a time scale,
indicating transfer progress.
The upper part of this figure shows the behavior of the transfer number counter. The inner loop counter
remain value (IRM) downcounts at every transfer. The IRM reloads the inner loop counter initial value
(IIN), when the transfers of the number specified in IIN have been executed. The outer loop counter
remain value (ORM) downcounts at the timing when the inner loop counter reloads. The DSTC counts the
number of transfers using this dual loop counter.
During a transfer, when the IRM reloads, it can be decided that whether the operation of returning a
transfer address (SA/DA) to its initial value is executed. (InnerReload)
The middle part of this figure shows the update behavior of the transfer address for increment with
InnerReload. As shown in this figure, if transfer address increment and InnerReload are selected, after a
transfer starts, the transfer address increases, and at the timing of IRM reload, is reset to the value at the
start of the transfer.
The lower part of this figure shows the update behavior of the transfer address for increment without
InnerReload. The increment update of the transfer address continues for the timing of reloading the IRM.
Figure 3-1 illustrates also the operation of OuterReload. For its details, see the section on OuterReload.
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