CHAPTER 6: Low Power Consumption Mode
234 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
8.5 Deep Standby Return Factor Register 2 (WIFSR)
The Deep Standby Return Factor Register 2 indicates the return factors of the WKUPx pin input, the low
voltage detection (LVD) interrupt, the RTC interrupt and the HDMI-CEC/Remote Control Reception
interrupt that have occurred in a deep standby mode.
[bit15:10] Reserved: Reserved bits
These bits always read 0b000000.
Writing a value to these bits has no effect on operation.
[bit9] WCEC1I: CEC ch.1 interrupt return bit
This bit indicates the CPU has returned from a deep standby mode due to the HDMI-CEC/Remote
Control Reception ch.1 interrupt.
The CPU has not returned from a deep standby mode due to the HDMI-CEC/Remote Control
Reception ch.1 interrupt. [initial value]
The CPU has returned from a deep standby mode due to the HDMI-CEC/Remote Control Reception
ch.1 interrupt.
[bit8] WCEC0I: CEC ch.0 interrupt return bit
This bit indicates the CPU has returned from a deep standby mode due to the HDMI-CEC/Remote
Control Reception ch.0 interrupt.
The CPU has not returned from a deep standby mode due to the HDMI-CEC/Remote Control
Reception ch.0 interrupt. [initial value]
The CPU has returned from a deep standby mode due to the HDMI-CEC/Remote Control Reception
ch.0 interrupt.
[bit7:2] WUI5 to WUI0: WKUPx pin input return bits
These bits indicate the CPU has returned from a deep standby mode due to the WKUPx pin input.
The CPU has not returned from a deep standby mode due to the WKUPx pin input. [initial value]
The CPU has returned from a deep standby mode due to the WKUPx pin input.