Cypress FM4 Series - Low-Voltage Detection Voltage Protection Register (LVD_RLR)

CHAPTER 5: Low-voltage Detection
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 187
5.4 Low-voltage Detection Voltage Protection Register (LVD_RLR)
The Low-voltage Detection Voltage Protection Register (LVD_RLR) write-protects the Low-voltage
Detection Voltage Control Register (LVD_CTL).
bit
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Field
LVDLCK[31:16]
Attribute
R/W
Initial value
0x0000
bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Field
LVDLCK[15:0]
Attribute
R/W
Initial value
0x0001
[bit31:0] LVDLCK[31:0]: Low-voltage Detection Voltage Control Register protection bits
− When 0x1ACCE553 is written:
Writing to the Low-voltage Detection Voltage Control Register(LVD_CTL) is enabled (releases write
protection mode).
− When a value other than 0x1ACCE553 is written:
Writing to the Low-voltage Detection Voltage Control Register(LVD_CTL) is disabled(enables write
protection mode).
− When the protection of the Low-voltage Detection Voltage Control Register(LVD_CTL) is released:
0x00000000 is read.
− When the Low-voltage Detection Voltage Control Register(LVD_CTL) is protected:
0x00000001 is read.
Notes:
− The Low-voltage Detection Voltage Control Register (LVD_CTL) is write-protected in the initial
state. To write the LVD_CTL Register, set 0x1ACCE553 to the Low-voltage Detection Voltage
Protection Register (LVD_RLR) to release write protection mode.
− To enable write protection mode of the LVD_CTL register, set a value other than 0x1ACCE553 to
the Low-voltage Detection Voltage Protection Register (LVD_RLR).
− Once write protection mode is released for the LVD_CTL Register, it remains released until a
value other than 0x1ACCE553 is written to the LVD_RLR Register.
− This register is not initialized by the deep standby transition reset.