CHAPTER 14: External Bus Interface
840 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
7. Usage Precautions
This section explains the usage precautions for the external bus interface.
AC Specifications
See the data sheets for the AC specifications in each operating mode.
External Bus Pin and GPIO Setup
For using the GPIO as an external bus pin, it is required to set the GPIO to the external bus pin setup with
the EPFR register. See Chapter I/O Port for the details.
Error Responses
When an access is made to an external bus area of 256MB SRAM/Flash memory address area, an area
which has not been mapped with the area register, or SDRAM address area with the setting of SDRAM
mode register of SDON=0, the external bus interface outputs an error response (by setting HRESP[1:0] to
"01"). When this error occurs during a burst transfer, the operation of the external bus interface is not
guaranteed.
Target Device and Functions Setups
For the setups for each function per target device, see Table 7-1.
Table 7-1 Target Device and Functions Setups
Do not make a setup using page read and external RDY at the same time.
Rewrite Timing of Register Value
When the setup value of registers such as the timing register is rewritten from the CPU while accessing
the external bus from the DMAC, written values will not be reflected until the access is completed (after
the idle cycle).
Procedure example of configuration after power supply
When using the external bus interface, set EXBRST bit of peripheral reset control register 0 (MRST0)
become 1. See setup procedure example.
If using external bus interface without executing external bus interface reset, there is a possibility that the
device become runaway, because the access request to external bus interface cannot be accepted.
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