Cypress FM4 Series - CRC Control Register (CRCCR)

CHAPTER 13: CRC (Cyclic Redundancy Check)
750 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
3.1 CRC Control Register (CRCCR)
The CRC Control Register (CRCCR) is used to control CRC calculation.
bit
7
6
5
4
3
2
1
0
Field
Reserved
FXOR
CRCLSF
CRCLTE
LSBFST
LTLEND
CRC32
INIT
Attribute
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value
0
0
0
0
0
0
0
0
[bit7] Reserved: Reserved bit
The read value is "0".
Be sure to write "0" to this bit.
[bit6] FXOR: Final XOR control bit
This bit is used to output the CRC result as the XOR value or XOR.
The XOR value is set to 0xFFFFFFFF. The CRC result value is inverted at FXOR="1".
This processing is performed in the latter part of the CRC Register(CRCR) processing. The CRC result is
therefore reflected on the read value immediately after this bit was set.
bit
Description
0
None
1
Yes
[bit5] CRCLSF: CRC result bit-order setting bit
This is a bit-order setting bit for CRC result.
This bit is used to rearrange bits within each byte. Set "0" to specify MSB First and set "1" to specify LSB
First.
This processing is performed in the latter part of the CRC Register(CRCR) processing. The CRC result is
therefore reflected on the read value immediately after this bit was set.
bit
Description
0
MSB First
1
LSB First
[bit4] CRCLTE: CRC result byte-order setting bit
This is a byte-order setting bit for CRC result.
This bit is used to rearrange the byte order in each word. Set "0" to specify big endian and set "1" to
specify little endian.
This processing is performed in the latter part of the CRC Register(CRCR) processing. The CRC result is
therefore reflected on the read value immediately after this bit was set.
If this bit is set to "1" in CRC16 mode, data is output to the D[31:16] of CRC Register(CRCR).
bit
Description
0
Big endian
1
Little endian