Cypress FM4 Series - Registers

CHAPTER 14: External Bus Interface
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 803
6. Registers
This section explains the configuration and functions of registers used for the external bus interface.
The following explains the registers used for the external bus interface. The bit width of every register is
32. Each register can be accessed by the APB interface with 32-bit width (word).
However, because external bus interface control is performed on the AHB side, the setting values are
applied to the control registers on the AHB side immediately after the registers are written from the APB
interface. To confirm that the control registers were set, read the registers immediately after writing to
them in order to check that the setting values were applied.
Write 0 to reserved areas.
These registers can be rewritten while in external accessing. Actual setup value reflection will be made
after current access is complete. Reading register before this reflection will read the previous setup value.
Table 6-1 lists the registers.
Table 6-1 Register list
Abbreviation
Register Name
Reference
MODE0 to MODE7
Mode Register 0 to Mode Register 7
6.1
TIM0 to TIM7
Timing Register 0 to Timing Register 7
6.2
AREA0 to AREA7
Area Register 0 to Area Register 7
6.3
ATIM0 to ATIM7
ALE Timing Register 0 to 7
6.4
SDMODE
SDRAM Mode Register
6.5
REFTIM
Refresh Time Register
6.6
PWRDWN
Power Down Count Register
6.7
SDTIM
SDRAM Timing Register
6.8
SDCMD
SDRAM Command Register
6.9
MEMCERR
Memory Controller Error Register
6.10
DCLKR
Division Clock Register
6.11
EST
Error Status Register
6.12
WEAD
Write Error Address Register
6.13
ESCLR
Error Status Clear Register
6.14
AMODE
Access Mode Register
6.15
Notes:
− Each register can not write access with 16-bit width(half word) or 8-bit width(byte).
− Since the write value it takes time until reading is enabled, each register can not be
read-modify-write in the bit-band alias region.