CHAPTER 2-3: High-Speed CR Trimming
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 115
2. High-Speed CR Trimming Function Configuration and Block Diagram
This section explains the configuration and block diagram of high-speed CR oscillator frequency trimming
function.
Figure 2-1 shows the block diagram of high-speed CR frequency trimming function.
Figure 2-1 Block Diagram of the High-speed CR Oscillator Timing Circuit
Configuration
High-speed CR OSC macro
A macro of the high-speed CR clock outputs CLKHC (high-speed CR clock).
In addition, the frequency trimming can be performed with TRD bit of high-speed CR oscillation frequency
trimming register (MCR_FTRM) and TRT bit of high-speed CR oscillation temperature trimming register
(MCR_TTRM).
High-speed CR Trimming Control Circuit and register block
A control circuit and registers for trimming high-speed CR.
In addition, the high-speed CR clock (CLKHC_div) divided by the ratio set with CSR bit of high-speed CR
oscillation frequency division setup register (MCR_PSR) is output to the base timer ch.0.
Base timer
This block counts frequency before setting to calculate the frequency trimming data for high-speed CR.
Note:
− For the clock definition, see Chapter Clock.
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