CHAPTER 13: CRC (Cyclic Redundancy Check)
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 743
2. CRC Operations
This section provides an overview of CRC operations.
CRC Definition
CCITT CRC16 Standard
Generator polynomial 0x1021 (CRCCR:CRC32=0)
Initial value 0xFFFF
Final XOR value 0x0000 (CRCCR:FXOR=0)
bit order MSB First (CRCCR:LSBFST=0)
Output bit order MSB First (CRCCR:CRCLSF=0)
(The input-output byte order can be specified arbitrarily.)
IEEE-802.3 CRC32 Ethernet Standard
Generator polynomial 0x04C11DB7 (CRCCR:CRC32=1)
Initial value 0xFFFFFFFF
Final XOR value 0xFFFFFFFF (CRCCR:FXOR=1)
bit order LSB First (CRCCR:LSBFST=1)
Output bit order LSB First (CRCCR:CRCLSF=1)
(The input-output byte order can be specified arbitrarily.)
Reset Operations
When resetting, the Initial Value Register (CRCINIT) and CRC Register (CRCR) are set to 0xFFFFFFFF.
Other registers are cleared to "0".
Initialization
Initializing with the initialization bit (CRCCR:INIT) loads the value of the Initial Value Register to the
CRC Register (CRCR).
Processing Byte and Bit Orders
The following shows how to process byte and bit orders, using examples.
Input the following one word to the CRC computing unit.
133.82.171.1 = 10000101 01010010 10101011 00000001
If the byte order is set to big endian (CRCCR:LTLEND=0), the sending sequence in bytes is configured as
shown below.
10000101 01010010 10101011 00000001
(1st) (2nd) (3rd) (4th)
If the bit order is set to Little endian (CRCCR:LSBFST=1), the sending sequence in bits is configured as
shown below.
10100001 01001010 11010101 10000000
(Head) (End)
Note:
− At CRCCR:CRCLTE=1, the CRC result is rearranged in bytes with the 32-bit width in both
CRC16 and CRC32.
In particular, in CRC16 mode, note that data is output to bit 31 to bit 16.
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