Cypress FM4 Series - Port Pseudo-Open Drain Set Register (VBPZR)

CHAPTER 7-3: VBAT Domain(B)
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 351
7.13 Port Pseudo-Open Drain Set Register (VBPZR)
VBPZR Register sets the port pseudo-open drain of a pin.
bit
7
6
5
4
3
2
1
0
Field
Reserved
VPZR1
VPZR0
Attribute
-
R/W
R/W
Initial value
-
1
1
The interface circuit type for this register is type 3.
[bit7:2] Reserved: Reserved bits
These bits read 0b000000.
In a write access to these bits, write 0b000000 to them.
[bit1] VPZR1: P49/VWAKEUP pin pseudo-open drain set bit
[bit0] VPZR0: P48/VREGCTL pin pseudo-open drain set bit
Bit
Description
Reading
A read access reads the value of this bit. [Initial value = 1]
Writing
0
If digital H level is output from a GPIO port or a peripheral macro, the pin becomes H
level.
1
If digital H level is output from a GPIO port or a peripheral macro, the pin becomes Hi-Z.
The pull-up resistor is disconnected regardless of the setting of the PCR Register.