Cypress FM4 Series - Peripheral Function Clock Control Register 0 (CKEN0)

CHAPTER 2-2: Clock Gating
92 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
4.1 Peripheral Function Clock Control Register 0 (CKEN0)
This section explains Peripheral Function Reset Clock Register 0 (CKEN0).
bit
31
30
29
28
27
26
25
24
Field
Reserved
GIOCK
Reserved
EXBCK
Reserved
DMACK
Attribute
-
R/W
-
R/W
-
R/W
Initial value
-
1
-
1
-
1
bit
23
22
21
20
19
18
17
16
Field
Reserved
ADCCK[3:0]
Attribute
-
R/W
Initial value
-
1111
bit
15
14
13
12
11
10
9
8
Field
MFSCK[15:8]
Attribute
R/W
Initial value
0xFF
bit
7
6
5
4
3
2
1
0
Field
MFSCK[7:0]
Attribute
R/W
Initial value
0xFF
[bit31:29] Reserved: Reserved bits
Write 0 to these bits.
[bit28] GIOCK: Settings for operation clock supplying and gating to GPIO function
This bit controls the operation clock supplying and the gating to the I/O Port function. This bit controls all
the operation clocks to the I/O Port functions collectively.
When this bit is set to 1, the bus clock is supplied to the I/O Port function block and the I/O Port function
can be used.
When this bit is set to 0, the bus clock input to the I/O Port function block is gated. Note that the reading of
the input level and the setting change of the output power level are disabled while the bus clock is gated.
For details, see 5. Peripheral Clock Gating Function Usage Precautions.
bit
Description
0
The bus clock input to the I/O Port function block is gated.
1
The bus clock is supplied to the I/O Port function block. (Initial value)
Be sure to set 1 in order to use I/O Port function.
[bit27] Reserved: Reserved bit
Write 0 to this bit.