CHAPTER 2-2: Clock Gating
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 93
[bit26] EXBCK: Settings for operation clock supplying and gating of external bus
interface function
This bit controls the operation clock supplying and the gating to the external bus interface functions.
When this bit is set to 1, the bus clock is supplied to the external bus interface function block, and the
external bus interface function can be used. For products to which the external bus interface is not
mounted, do not change this bit from the initial value.
When this bit is set to "0", the bus clock input to the external bus interface function is gated. While the bus
clock input is gated, the external bus interface cannot be used.
The bus clock input to the external bus interface function block is gated.
The bus clock is supplied to the external bus interface function block. (Initial value)
[bit25] Reserved: Reserved bit
Write 0 to this bit.
[bit24] DMACK: Supplying and gating settings of DMAC operation clock
This bit controls the operation clock supplying and the gating to the DMAC function. When this bit is set
to1, the bus clock is supplied to the DMAC block and the DMAC function can be used.
When this bit is set to 0, the bus clock input to the DMAC block is gated. While the bus clock input is
gated, the DMAC function cannot be used.
The bus clock input to DMAC is gated.
The bus clock is supplied to DMAC. (Initial value)
[bit23:20] Reserved: Reserved bits
Write 0 to these bits.
[bit19:16] ADCCK[3:0]: Settings for operation clock supplying and gating to A/D
converter
These bits control the operation clock supplying and gating to the A/D converter. The following show the
correspondence between each bit and the A/D converter unit:
bit16 - ADCCK0: A/D converter unit 0
bit17 - ADCCK1: A/D converter unit 1
bit18 - ADCCK2: A/D converter unit 2
bit19 - ADCCK3: A/D converter unit 3
When the relevant bit is set to 1, the bus clock is supplied to the unit of the corresponding A/D converter
to enable the A/D converter function. For products to which the corresponding A/D converter is not
mounted, do not change the relevant bit from the initial value.
When the relevant bit is set to 0, the bus clock input to the corresponding A/D converter is gated. While
the bus clock input is gated, the relevant A/D converter cannot be used.
The bus clock input to the A/D converter unit corresponding to the relevant bit is gated.
The bus clock is supplied to the A/D converter unit corresponding to the relevant bit.
(Initial value)
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