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Cypress FM4 Series - Host Control 2 Register

Cypress FM4 Series
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CHAPTER 15: SD Card Interface
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 869
2.24 Host Control 2 Register
This register is used to control the Host Controller.
D15
D14
D13 D08
D07
D06
D05 D04
D03
D02 D00
Preset Value Enable
Asynchronous Interrupt
Enable (*1)
Rsvd
Sampling Clock Select
Execute Tuning
(*2)
Driver Strength Select
1.8V Signaling Enable
UHS Mode Select
*1: Regardless of the setting of this bit, the SD card interface handles all interrupts of interrupt periods
except the interrupt period at the data block gap as asynchronous interrupts. Therefore, the interrupt
reception control logic does not use the setting of this bit.
*2: Before setting the Execute Tuning bit in Divided Clock Mode, set the SDCLK Frequency Select bits in
the
Clock Control Register to 0x00.
For other details of this register, refer to SD Specifications Part A2.

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