Cypress FM4 Series - Extended Pin Function Setting Register 29 (EPFR29)

CHAPTER 12: I/O Port
720 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
4.37 Extended Pin Function Setting Register 29 (EPFR29)
EPFR29 register sets the function assignment to GDC Panel pins.
Register Configuration
bit
31
30
29
28
27
26
25
24
Field
PNL_TSIG11E
PNL_TSIG10E
PNL_TSIG9E
PNL_TSIG8E
Attribute
R/W
R/W
R/W
R/W
Initial value
00
00
00
00
bit
23
22
21
20
19
18
17
16
Field
PNL_TSIG7E
PNL_TSIG6E
PNL_TSIG5E
Reserved
Attribute
R/W
R/W
R/W
-
Initial value
00
00
00
-
bit
15
14
13
12
11
10
9
8
Field
PNL_PD23E
PNL_PD22E
PNL_PD21E
PNL_PD20E
Attribute
R/W
R/W
R/W
R/W
Initial value
00
00
00
00
bit
7
6
5
4
3
2
1
0
Field
PNL_PD19E
PNL_PD18E
PNL_PD17E
PNL_PD16E
Attribute
R/W
R/W
R/W
R/W
Initial value
00
00
00
00
Register Function
[bit31:30] PNL_TSIG11E: PNL_TSIG11 Output Select bits
Selects output for PNL_TSIG11.
bit
Description
Reading
Reads out the register value.
Writing
00
Does not produce output of GDC Panel PNL_TSIG11. [Initial value]
01
Uses PNL_TSIG11_0 at the output pin of GDC Panel PNL_TSIG11.
10
Setting is prohibited.
11
Setting is prohibited.
[bit29:28] PNL_TSIG10E: PNL_TSIG10 Output Select bits
Selects output for PNL_TSIG10.
bit
Description
Reading
Reads out the register value.
Writing
00
Does not produce output of GDC Panel PNL_TSIG10. [Initial value]
01
Uses PNL_TSIG10_0 at the output pin of GDC Panel PNL_TSIG10.
10
Setting is prohibited.
11
Setting is prohibited.