Cypress FM4 Series - Page 721

CHAPTER 12: I/O Port
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 721
[bit27:26] PNL_TSIG9E: PNL_TSIG9 Output Select bits
Selects output for PNL_TSIG9.
bit
Description
Reading
Reads out the register value.
Writing
00
Does not produce output of GDC Panel PNL_TSIG9. [Initial value]
01
Uses PNL_TSIG9_0 at the output pin of GDC Panel PNL_TSIG9.
10
Setting is prohibited.
11
Setting is prohibited.
[bit25:24] PNL_TSIG8E: PNL_TSIG8 Output Select bits
Selects output for PNL_TSIG8.
bit
Description
Reading
Reads out the register value.
Writing
00
Does not produce output of GDC Panel PNL_TSIG8. [Initial value]
01
Uses PNL_TSIG8_0 at the output pin of GDC Panel PNL_TSIG8.
10
Setting is prohibited.
11
Setting is prohibited.
[bit23:22] PNL_TSIG7E: PNL_TSIG7 Output Select bits
Selects output for PNL_TSIG7.
bit
Description
Reading
Reads out the register value.
Writing
00
Does not produce output of GDC Panel PNL_TSIG7. [Initial value]
01
Uses PNL_TSIG7_0 at the output pin of GDC Panel PNL_TSIG7.
10
Setting is prohibited.
11
Setting is prohibited.
[bit21:20] PNL_TSIG6E: PNL_TSIG6 Output Select bits
Selects output for PNL_TSIG6.
bit
Description
Reading
Reads out the register value.
Writing
00
Does not produce output of GDC Panel PNL_TSIG6. [Initial value]
01
Uses PNL_TSIG6_0 at the output pin of GDC Panel PNL_TSIG6.
10
Setting is prohibited.
11
Setting is prohibited.
[bit19:18] PNL_TSIG5E: PNL_TSIG5 Output Select bits
Selects output for PNL_TSIG5.
bit
Description
Reading
Reads out the register value.
Writing
00
Does not produce output of GDC Panel PNL_TSIG5. [Initial value]
01
Uses PNL_TSIG5_0 at the output pin of GDC Panel PNL_TSIG5.
10
Setting is prohibited.
11
Setting is prohibited.