CHAPTER 10: DMAC
454 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
1. Overview of DMAC
DMAC (Direct Memory Access Controller) is a function block that transfers data at high speed without
CPU. Using DMAC improves the system performance.
Overview of DMAC
− DMAC has its own bus which is independent from the CPU bus; therefore, it allows for transfer
operation even when the CPU bus is accessed.
− It consists of 8 channels enabled to execute 8 types of different DMA transfers independently from
one another.
− It can set the address of the transfer destination, the address of the transfer source, the size of
transfer data, the source of transfer request and the transfer mode, and control the start of transfer
operation, the forced termination of transfer and the pause of transfer for each channel.
− It can control the batch start of transfers, the forced batch termination of transfers and the batch
pause of transfers for all of the channels.
− When multiple channels are operating simultaneously, it can select the priority of such channel
operations from the fixed method or the rotated method.
− It supports hardware DMA transfer using an interrupt signal from Peripherals.
− It complies with the system bus (AHB), supporting 32-bit address space (4 Gbytes).
Overview of Functions of Each Channel
− The addresses of the transfer source and transfer destination can be incremented or fixed.
− Reload function for the addresses of the transfer source and transfer destination (i.e. function to
return the values to the original settings upon completion of the transfer) is available.
− The size of data to be transferred can be selected from the following three specifications:
Transfer data width: (Select from byte/half-word/word)
Setting the number of blocks: (Select from 1 to 16)
Setting the number of transfers: (Select from 1 to 65536)
(For information about the difference between the number of blocks and the number of transfers,
see 3 Functions and Operations of DMAC.)
− Whether or not to give notification of the successful completion of transfer and unsuccessful
completion of transfer can be specified.
− Transfer mode can be selected from the following five types:
Software-Block transfer
Software-Burst transfer
Hardware-Demand transfer
Hardware-Block transfer
Hardware-Burst transfer
Transfer Modes
Software transfer is a method used to start DMAC by direct instruction from CPU.
Hardware transfer is a method using an interrupt signal from a Peripheral as the DMAC transfer request
signal to start DMAC directly when the Peripheral issues a transfer request.
Multifunction serial unit, USB unit and ADC unit directly instruct DMAC to start data transfer, when
sending/receiving data or A/D conversion data needs to be transferred. External interrupt unit and Base
timer unit directly instruct DMAC to start data transfer at a transfer timing. In either of the cases, data can
be transferred without CPU by making such setting beforehand.
Abbreviations
This chapter contains the following terms: DE, DS, DH, PR, EB, PB, ST, IS, BC, TC, MS, TW, FS, FD, RC,
RS, RD, EI, CI, SS, EM. All of these terms refer to each bit of DMAC control registers (DMACR, DMACSA,
DMACDA, DMACA, DMACB). See "5 Registers of DMAC".
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