CHAPTER 1: System Overview
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 27
1.2 Memory Architecture
This section shows the memory architecture.
For this family, 4G-byte address space is available.
Maximum 4M-byte FLASH memory, maximum 512K-byte SRAM0 area, maximum 256K-byte SRAM1
area, and maximum 256K-byte SRAM2 area are defined.
Also, as an external bus area, 2G-byte area from 0x60000000 to 0xDFFFFFFF is defined. An external
memory device can be connected to this area.
Section 1.3 Memory Map illustrates the memory map, and Section 1.4 Peripheral Address Map illustrates
the peripheral address map.
For the details of Cortex-M4F private peripheral area and bit-band area shown in Figure 1-2, see
Cortex-M4 Technical Reference Manual.
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