CHAPTER 4: Resets
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 161
2. Configuration
This section explains configuration of reset circuit.
Block Diagram of Resets
Figure 2-1 Block Diagram of Resets
PONR : Power-on reset
INITX : INITX pin input reset
LVDH : Low-voltage detection reset
TRSTX : TRSTX pin input reset
HRESET : AHB bus reset (a bus reset issued by all reset factors)
PRESET0, 1, 2 : APB0, APB1, APB2 bus resets (bus resets issued by all reset factors)
SW-WDG reset : Software watchdog reset
HW-WDG reset : Hardware watchdog reset
CSV reset : Clock failure detection reset
FCS reset : Anomalous frequency detection reset
PORESETn : Power-on reset that is input to Cortex-M4F
SYSRESETn : System reset that is input to Cortex-M4F
SYSRESETREQ : "SYSRESETREQ bit" signal of Cortex-M4F internal reset control register
nTRST : SWJ-DP reset
DSTR : Deep standby transition reset
To Next Page
Loading...
