CHAPTER 5: Low-voltage Detection
176 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
1. Overview
The Low-voltage Detection Circuit monitors the power supply voltage, and generates reset and interrupt
signals when the power supply voltage falls below the detection voltage.
Overview of Low-voltage Detection Circuit
Operations of Low-voltage Reset Circuit
− This circuit monitors the power supply voltage (VCC) and generates a reset signal when the power
supply voltage falls below the specified voltage.
− This circuit always monitors the power supply voltage.
− This circuit monitors the power supply voltage even in standby modes and deep standby modes.
− This circuit generates a reset signal when the reduction of the power supply voltage is detected in
standby modes and deep standby modes.
Operations of Low-voltage Interrupt Circuit
− This circuit monitors the power supply voltage (VCC) and generates an interrupt signal when the
power supply voltage falls below the specified voltage.
− This circuit allows selection of whether to enable or disable operations. The initial value is set to
disable.
− This circuit allows specification of the detection voltage.
− This circuit can monitor the power supply voltage even in standby modes and deep standby modes.
− This circuit returns from standby modes and deep standby modes when the reduction of the power
supply voltage is detected in those modes
Notes:
− If a low-voltage detection interrupt is enabled or the detection voltage is specified for a
low-voltage detection interrupt, this circuit starts VCC voltage monitoring after the stabilization
wait time of the Low-voltage Detection Circuit has lapsed.
For the stabilization wait time of the Low-voltage Detection Circuit, see Data Sheet of the product
used.
− This circuit does not conduct monitoring the power supply voltage if PCLK2 is gated by TIMER
mode, RTC mode, STOP mode, Deep standby RTC mode, Deep standby STOP mode, or APB2
Prescaler Register (APBC2_PSR) while waiting for the stabilization of the Low-voltage Detection
Circuit. After the status flag is read and the stabilization wait time has lapsed, change to the
desired mode.
− The Low-voltage Detection Voltage Control Register (LVD_CTL) is write-protected to prevent a
writing error. To release write protection mode, write 0x1ACCE553 to the Low-voltage Detection
Voltage Protection Register (LVD_RLR).
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