Cypress FM4 Series - Configurations and Block Diagrams

CHAPTER 3: Clock Supervisor
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 141
2. Configurations and Block Diagrams
This section explains the block diagram of the clock supervisor functions.
Clock Failure Detection
Figure 2-1 shows the block diagram of the clock failure detection.
Figure 2-1 Clock Failure Detection Block Diagram
The clock failure detection consists of the following three types of blocks.
 Control circuit/register
− This block includes a circuit controlling the clock failure detection,
− Also includes setup registers enabling/disabling the clock failure detection.
 Main clock counter
A counter that monitors the main clock with the high-speed CR clock.
 Sub clock counter
A counter that monitors the sub clock with the low-speed CR clock.
Main clock
counter
Control circuit /
register
Sub clock counter
Main
Clock
Sub Clock
Low-Speed CR
CSV_RESET
High-speed
CR