Cypress FM4 Series - IRQ115 Batch Read Register (IRQ115 MON)

CHAPTER 8: Interrupts
FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E 427
4.35 IRQ115 Batch Read Register (IRQ115MON)
The IRQ115MON Register can read out at once the interrupts (Hi-Speed Quad SPI interrupt) assigned to
exception no. 131.
Register configuration
bit
31
8
Field
Reserved
Attribute
R
Initial value
0x000000
bit
7
6
5
4
3
2
1
0
Field
Reserved
QSPIINT
Attribute
R
R
Initial value
00000
000
Register function
[bit31:3] Reserved: Reserved bits
A reserved bit reads 0.
[bit2:0] QSPIDINT
bit
Value
Description
2
0
There is no fault detection interrupt of Hi-Speed Quad SPI.
1
An interrupt request of fault detection interrupt of Hi-Speed Quad SPI has been
made.
1
0
There is no transmission interrupt of Hi-Speed Quad SPI.
1
An interrupt request of transmission interrupt of Hi-Speed Quad SPI has been
made.
0
0
There is no reception interrupt of Hi-Speed Quad SPI.
1
An interrupt request of reception interrupt of Hi-Speed Quad SPI has been made.