Cypress FM4 Series - Error Interrupt Status Register

CHAPTER 15: SD Card Interface
862 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
2.18 Error Interrupt Status Register
Signals defined in this register can be enabled by the Error Interrupt Status Enable Register, but not by
the Error Interrupt Signal Enable Register. An interrupt is generated when its interrupt signal is enabled by
its corresponding bit in the Error Interrupt Signal Enable Register and its corresponding bit in the Error
Interrupt Status Enable Register is set to 1.
D15
D14
D13
D12
D11
D10
D09
D08
D07
D06
D05
D04
D03
D02
D01
D00
Rsvd
AHB Master Error
Auto CMD19 Error
Boot Acknowledge Error
Rsvd
Tuning Error
ADMA Error
Auto CMD12 Error
Current Limit
Error
Data End Bit Error
Data CRC Error
Data Timeout Error
Command Index Error
Command
End Bit Error
Command CRC Error
Command Timeout Error
Bit
Attribute
Description
15
Rsvd
There is no Vendor Specific Error Status bit.
14
ROC
AHB Master Error
This bit reads 1 when the AHB Memory I/F has received an error acknowledge to an
access output by this SD card interface.
After the AHB Memory I/F has received an error response, the SD card interface can be
initialized only by the system reset.
Set/Reset
Condition
Set
This bit is set to 1 if the AHB Master Error Status Enable bit in
the Error Interrupt Status Enable Register is 1 and the AHB
Memory I/F receives an error acknowledge.
If the AHB Master Error Status Enable bit in the Error Interrupt
Status Enable Register is 1 and 1 is written to the Force Event
for AHB Master Error bit in the Force Event Register for Error
Interrupt Status, this bit is set to 1.
Reset (0)
System reset
The AHB Master Error Status Enable bit in the Error Interrupt
Status Enable Register is 0.