Cypress FM4 Series - Page 768

CHAPTER 14: External Bus Interface
768 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
Page Read for 16-bit NOR Flash Memories
The page read operation is available for NOR Flash memories by setting PAGE bit which is the fifth bit of
the mode register (MODE0 to MODE7) to 1.
The page read will continue read cycle while in reading operation to the boundary of the 16 bytes with
MOEX=L retained. The waveform of 16-bit NOR Flash memory page read is shown in Figure 3-5.
The address is retained within the first cycle for specified cycles (First read address cycle). The accesses
after the first cycle will be made with the number of cycles specified by the RACC.
Figure 3-5 Waveform of 16-bit NOR Flash Memory Page Read
0 1 2 3 4 5 6 7 8 9
10
11 12 13 14 15
16
17 18 19
MAD[24:0]
MADATA[15:0]
MCSX[0]
First
read address cycle
Read access cycle 0
MOEX
Dat00 Dat02 Dat04 Dat06 Dat08 Dat10 Dat12
00 02 04 06 08 10 12 14
Read access cycle 1
Read access cycle 2
Read access cycle 3
Read access cycle 4
Read access cycle 5
Read access cycle 6
Read access cycle 7
MCLK
(MCLKOUT)
− MOEX will be asserted at the same timing of MCSX.
− The first read address cycle is a FRADC cycle set with the TIM register.
Notes:
− Page read is not available in multiplex mode.
− Page read is not available in NAND Flash memory mode.