Cypress FM4 Series - Page 1090

A. Register Map
1090 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
Base_Address
+ Address
Register
+3
+2
+1
+0
0x054
*[W]
0x058
dsp0_PowerEnControl[W]
-------- -------- -------- -------0
0x05C
dsp0_ClockGateModeLock[W]
00000000 00000000 00000000 00000000
0x060
dsp0_ClockGateControl[W]
-------- -------- -------- -------0
0x064
-
0x068
-
0x06C
-
0x070
-
0x074
-
0x078
SDRAMC_ClcokDivider[W]
-------- 00000100 00000000 --------
0x07C
SDRAMC_DomainControl[W]
-------- -------1 -------- -------0
0x080
HSSPIC_ClockDivider[W]
-------- 00000100 00000000 --------
0x084
HSSPIC_DomainControl[W]
-------- -------1 -------- -------0
0x088
RPCC_ClcokDivider[W]
-------- -------- -------- -----000
0x08C
RPCC_DomainControl[W]
-------- -------1 -------- -------0
0x090
-
0x094
-
0x098
-
0x09C
-
0x100
vram_LockUnlock[W]
00000000 00000000 00000000 00000000
0x104
vram_LockStatus[W]
-------- -------- -------0 ---0---0
0x108
vram_sram_select[W]
-------- -------- ----0000 00000000
0x10C
*[W]