CHAPTER 2-3: High-Speed CR Trimming
118 FM4 Peripheral Manual, Doc. No. 002-04856 Rev. *E
Frequency Trimming Data Acquisition Example
When acquiring the data from the CR trimming area in the flash memory;
Read the CR trimming area in the flash memory and get the data.
Write the acquired value to TRD bit of the High-speed CR oscillation Frequency Trimming Setup Register
(MCR_FTRM).
How to Calculate the Frequency Trimming Data
The following explains how to calculate the trimming data of high-speed CR oscillation.
1. Let Ftgt, a target oscillation frequency be 4[MHz] and Ttgt, its cycle be 250[ns](Ftgt: 4[MHz]). Let
Xtrm_coarse and Xtrm_fine be the TRD[9:5] bit values and TRD[4:0] bit values of the High-speed CR
Oscillation Frequency Trimming Setup register at the time respectively.
2. Set 0b00000 to TRD[4:0] bits.
3. Let Xtrm_coarse be Xtrmmin_coarse when 0b00000 is set to TRD[4:0] bits. Let Tmax_coarse[sec] be
the cycle at this time.
4. Let Xtrm_coarse be Xtrmmax_coarse when 0b11111 is set to TRD[9:5] bits. Let Tmin_coarse[sec] be
the cycle at this time.
5. By calculating the following expression, obtain TRD[9:5] setting value, Xtrm_coarse giving the value
more than target oscillation cycle, Ttgt.
31
max_min_
max_
31
min_max_
_
coarseTcoarseT
coarseT
corseTcoarseT
Ttgt
coarseXtrm
*: Round down decimals.
6. Set the obtained Xtrm_coarse to TRD[9:5] bits.
7. Confirm that the High-speed CR clock, FCRH, after setting TRD bits is Ftgt or less. If the FCRH exceed
Ftgt, subtract “1” from Xtrm_coarse and then return to Step 6.When the FCRH is Ftgt or less, go to Step 8.
8. Let the value when “0b00000” is set to TRD[4:0] be Xtrimmin_fine. Let Tmax_fine[sec] be the cycle at
this time.
9. Let the value when “0b11111” is set to TRD[4:0] be Xtrimmax_fine. Let Tmin_fine[sec] be the cycle at
this time.
10. By calculating the following expression, obtain TRD[4:0] setting value, Xtrm_fine giving the target
oscillation cycle, Ttgt.
31
max_min_
max_
31
min_max_
_
fineTfineT
fineT
fineTfineT
Ttgt
fineXtrm
*: Round down decimals.
11. Set the obtained Xtrm_fine to TRD[4:0] bits.
12. Confirm whether the High-speed CR clock, FCRH, after setting TRD bits is Ftgt or more and within the
specification value of the High-speed CR clock oscillation frequency. If FCRH exceeds the specification
value, subtract “1” from Xtrm_fine and return to Step 11. Moreover, if FCRH is less than Ftgt, add “1” to
Xtrm_fine and return to Step 11. When the value is within the specification values, the calculation of
trimming data is finished.
Note:
− For specifications of High-speed CR Clock Oscillation frequency, see “Data Sheet” of the product
used.
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